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  4. Dissertation, EC (VLSI)
Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/10059
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dc.contributor.authorPatel, Ravi-
dc.date.accessioned2021-09-06T05:28:27Z-
dc.date.available2021-09-06T05:28:27Z-
dc.date.issued2021-06-01-
dc.identifier.urihttp://10.1.7.192:80/jspui/handle/123456789/10059-
dc.description.abstractManual design can occur with small number of transistors. As number of transis- tors increase through VLSI design, the amount of evaluation and decision making has become overwhelming. Computer-aided Design (CAD) tool automates this whole process, hence it reduces TTM (Time To Market). CAD tools allow large and com- plex problems to ben_US
dc.publisherInstitute of Technologyen_US
dc.relation.ispartofseries21MECV11;-
dc.subjectEC 2021en_US
dc.subjectProject Report 2021en_US
dc.subjectEC Project Reporten_US
dc.subjectProject Reporten_US
dc.subject21MECen_US
dc.subject21MECVen_US
dc.subject21MECV11en_US
dc.subjectVLSIen_US
dc.subjectVLSI 2021en_US
dc.subjectEC (VLSI)en_US
dc.titleClouden_US
dc.typeDissertationen_US
Appears in Collections:Dissertation, EC (VLSI)

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