Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/11256
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dc.contributor.authorKoshti, Sanjay-
dc.date.accessioned2022-09-08T09:16:52Z-
dc.date.available2022-09-08T09:16:52Z-
dc.date.issued2022-06-01-
dc.identifier.urihttp://10.1.7.192:80/jspui/handle/123456789/11256-
dc.description.abstractModern embedded processing systems frequently have a diverse set of individually complex requirements, often including application processing, real-time processing, high data bandwidth processing, and requirements for peripherals to handle human-machine interfaces, data I/O, and system control. All of this must be managed within a power budget, and frequently, the power budget varies with the required functions to be performed. Such requirements typically cannot be met by a single type of processor. With the introduction of the Zynq UltraScale + MPSoC, Xilinx brings to market a new all-programmable device where multiple processing elements can be designed to focus independently on a subset of the required functions. When these independently operable elements are assembled together in a heterogeneous system, a highly diverse set of processing requirements can be met with a very high level of operational efficiency. In addition, power and performance can be ideally balanced against each other, thanks to the many power management features implemented in the Zynq UltraScale + MPSoC.en_US
dc.publisherInstitute of Technologyen_US
dc.relation.ispartofseries20MECE11;-
dc.subjectEC 2020en_US
dc.subjectProject Report 2020en_US
dc.subjectEC Project Reporten_US
dc.subjectEC (ES)en_US
dc.subjectEmbedded Systemsen_US
dc.subjectEmbedded Systems 2020en_US
dc.subject20MECen_US
dc.subject20MECEen_US
dc.subject20MECE11en_US
dc.titleXilinx Platform Management using Subsystem Technical Reference Designs (TRD’s)en_US
dc.typeDissertationen_US
Appears in Collections:Dissertation, EC (ES)

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