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http://10.1.7.192:80/jspui/handle/123456789/11269
Title: | Accessing the Configuration and Status Registers in a Typical SoC |
Authors: | Tiwari, Aishwary |
Keywords: | EC 2020 Project Report 2020 EC Project Report EC (VLSI) VLSI VLSI 2020 20MEC 20MECV 20MECV01 |
Issue Date: | 1-Jun-2022 |
Publisher: | Institute of Technology |
Abstract: | Recent SOCs comprises of a large number of intellectual property (IP) cores embedded in to them and hence various protocols are used for effective communication between the sub-blocks. AMBA family communication protocols such as advanced extensible interface (AXI), advanced high-performance bus (AHB) and advanced peripheral bus (APB) are most widely used in the SOCs depending upon the properties of the components inside the SOC. As the complexity of design is increasing with time, number of Configuration and Status registers are also increasing and to access such registers in an efficient way some specified protocol is required. In this project, various register accessing techniques are explored as well as implemented. APB protocols are useful for accessing CSRs in a typical SOC. There are different cases of CSR operations, In some of the cases, CSRs are designed by taking into consideration the APB protocols thus including the APB based signals on them while in other cases a bridge or block is to be developed such that APB modules can have an effective interaction or communication with CSRs. Sometimes CSRs already posses ABP oriented signals for transactions while other times, a glue logic is to be implemented to act as an interface between ABP master and Non-ABP slave. In my work I have used both systemRDL generated registers as well as manually written code for CSRs in SystemVerilog and have demonstrated how The transactions can be carried out using ABP protocol. |
URI: | http://10.1.7.192:80/jspui/handle/123456789/11269 |
Appears in Collections: | Dissertation, EC (VLSI) |
Files in This Item:
File | Description | Size | Format | |
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20MECV01.pdf | 20MECV01 | 1.1 MB | Adobe PDF | ![]() View/Open |
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