Design and Development of VHDL Based DSP Algorithm for RADAR Signal Processing

Abstract

The FMCW Radar based Altitude Sensor is intended for measuring the altitude of an airborne platform above ground. It makes use of Frequency Modulated Continuous Waveform as the signal transmitted towards ground. The major subsystems of Radar Altitude Sensor are Antenna-Radom Assembly, RF Transceiver Module and DSP Module. The function of the DSP module is to process the delayed, attenuated and Doppler shifted echo signals for extracting the information pertaining to altitude as well as velocity of the airborne platform. Echo signal is down converted and sampled by Analog to Digital converter. The assigned project work is focused on the realization and performance evaluation of the signal processing scheme for the FMCW Radar based Altitude Sensor which requires the basics of Digital Signal Processing and VHDL as a prerequisites.

DFT, FFT, Convolution, Filter, Digital Down Conversion are the major building blocks which have been comprehensively studied, analyzed, simulated in MATLAB and evaluated for their performance on FPGA. An in-depth study has been carried out for the architecture of Virtex-6 FPGA (Make: Xilinx) and its evaluation board (ML605, Make: Xilinx). These algorithms have been first simulated, analyzed in MATLAB which has been followed by its implementation & performance evaluation in Virtex - 6 FPGA. Based on these building blocks, the entire scheme of signal processing for FMCW Radar has been simulated in MATLAB as well as implemented & functionally demonstrated on FPGA. The performance of the related algorithms & schemes has been evaluated in terms of their computational efficiency as well as in terms of its advantages and limitations.