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DC Field | Value | Language |
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dc.contributor.author | Tekwani, P. N. | - |
dc.contributor.author | Baiju, M. R. | - |
dc.contributor.author | Gopakumar, K. | - |
dc.contributor.author | Kanchan, R. S. | - |
dc.date.accessioned | 2009-11-07T06:32:40Z | - |
dc.date.available | 2009-11-07T06:32:40Z | - |
dc.date.issued | 2005 | - |
dc.identifier.citation | International Power Electronic Conference, IPEC-2005, Toki Messe, Niigata, Japan, April 4-8, 2005 | en |
dc.identifier.uri | http://hdl.handle.net/123456789/1281 | - |
dc.description | Page No. 1231-1238 | en |
dc.description.abstract | A seven-level inverter scheme, for an open-end winding induction motor drive, is proposed in this paper. The open-end winding induction motor is fed from both sides with three-level inverters. Each three-level inverter is formed by cascading two two-level inverters. The DC link voltage of the top two-level inverter is equal to Vdc /3, while the DC link voltage of the bottom two-level inverter is Vdc /6, where Vdc is the DC link voltage of the equivalent two-level inverter. This results in the space vector combinations similar to conventional seven-level inverter. The proposed seven-level inverter configuration requires lesser number of switching devices as compared to conventional seven-level inverter scheme. Similarly, lesser isolated power supplies are required when compared to the cascaded H-bridge configuration. A space phasor based PWM modulator is used for generation of inverter leg switching times and inverter-switching vectors, directly from instantaneous sampled magnitudes of reference voltages. The proposed scheme is implemented on a 1.5 kW, induction motor and the experimental results are presented. | en |
dc.language.iso | en_US | en |
dc.subject | AC Drives | en |
dc.subject | Multi-Level Inverters | en |
dc.subject | Electrical Faculty Paper | - |
dc.subject | Faculty Paper | - |
dc.subject | ITFEE003 | - |
dc.title | A Seven Level Voltage Space Phasor Generation Scheme For An Open-End Winding Induction Motor Drive With Asymmetric Dc Link Voltages | en |
dc.type | Faculty Papers | en |
Appears in Collections: | Faculty Papers, EE |
Files in This Item:
File | Description | Size | Format | |
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ITFEE003-16.pdf | ITFEE003-16 | 1.53 MB | Adobe PDF | ![]() View/Open |
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