Study and Implementation of CMOS IO's for Sub Micron VLSI Circuits

Abstract

The objective of the work carried out is to design and implement the 2.5v IO in the 90nm technology according to the specifications required by the end user which act as an interface between the core and the off chip environment.If package is consider as one of the protective layer ,then the IO frame is the second protective layer to the core Any external hazards such as electrostatic discharge (ESD) and noises should be filtered out before propagating to the internal circuit for their protection. My work concentrates on the designing and the implementation of the input buffer as per the specification required by the end user. On the broader sense an input buffer mainly consist of the ESD circuit, Schmitt trigger, level shifter and if required the driver too. In the work carried out various aspects from designing to layout (taking into consideration the latch up issue) to validation have been considered. The design is basically for 90nm technology. The design quality of I/Os is a critical factor, which is again governed by process corners, voltage and temperature. MOSFET suffer from substantial parameter variations from wafer to wafer and from lot to lot. Despite decades of technology development, the large variability of CMOS circuits remains a fact with which digital and analog designers must cope. Basically four corners have been defined N-fast and P-slow, N-slow and P-slow, N-fast and P-slow, P-fast and N-slow. Besides these four process corners one more process corner has been considered i.e. N-typical and P-typical which may lie some where between fast and slow. Apart from the processes, there may be change in voltage as well as temperature. So for a particular technology high value, typical value and low value of the voltages are decided on which the I/Os as well as core has to operate. Similarly the temperature range has been defined in the range of -40oC to 25oC to 125oC i.e. minimum, typical and maximum respectively. Besides designing more of the importance has been given to layouts as that is the real system which is going to operate in real world. Certain checks like design rule checks, electrical rule checks and specially latch up prevention has been kept in mind while drawing the layouts as latch up alone can kill whole design by drawing large amount of currents and hence power consumption, which is some thing the deciding factor of a good design and of course for the end user.