Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/1586
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dc.contributor.authorJoshi, Hemant I.-
dc.date.accessioned2010-06-14T05:39:21Z-
dc.date.available2010-06-14T05:39:21Z-
dc.date.issued2010-06-01-
dc.identifier.urihttp://hdl.handle.net/123456789/1586-
dc.description.abstractPerformance of multi-level inverters is highly superior to conventional two-level in-verter, so they have been widely used for high-power high-voltage applications. Due to higher number of sources, lower EMI, lower %THD in output voltage and less stress on insulation, multi-level inverters are widely used. However, multi-level in- verter technology has some disadvantages as complicated PWM controlling method, increased number of components and voltage balancing problem at neutral point. In this thesis a new topology called Reversing Voltage is implemented to improve multi-level performance by compensating the disadvantages just mentioned. This topology requires fewer components compared to available multi-level inverters (es- pecially at higher number of voltage levels) and requires less carrier signals and does not need separate mechanism for balancing of the capacitor voltages. This multi-level inverter structure offers reduced device count and simple power bus structure when compared to a conventional five-level NPC and flying capacitor inverter. The topology and the control method based on sine-triangle pulse width modu- lation (SPWM) are shown and the required components are also compared to other topologies to show the superiority of the topology. In the first phase, prototype model of 1-five-level inverter using Reversing Voltage topology is prepared and tested on R-L load and 1-_ induction motor load. Finally prototype of 3-five-level inverter using same topology is prepared and tested on R-L load and 3-_ induction motor load. Detailed simulation studies were initially carried out and experimental results on different types of loads are presented and discussed. The scheme shows a very good potential of its application in induction motor drives, FACTS, HVDC transmission etc. Experimental implementation was done using AT89S52 micro-controller. The good steady state and transient performance of the inverter implemented here is ev- ident from the simulated and experimental waveforms shown in this thesis.en
dc.language.isoen_USen
dc.publisherInstitute of Technologyen
dc.relation.ispartofseries08MEE005en
dc.subjectElectrical 2008en
dc.subjectProject Report 2008en
dc.subjectElectrical Project Reporten
dc.subjectProject Reporten
dc.subjectEC (PEMD)en
dc.subjectPower Electronics, Machines  & Drivesen
dc.subject08MEEen
dc.subject08MEE005en
dc.subjectPEMD-
dc.subjectPEMD 2008-
dc.titleDesign and Development of Multi-level Inverter using Reversing Voltage Topologyen
dc.typeDissertationen
Appears in Collections:Dissertation, EE (PEMD)

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