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DC Field | Value | Language |
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dc.contributor.author | Joshi, Hemant I. | - |
dc.date.accessioned | 2010-06-14T05:39:21Z | - |
dc.date.available | 2010-06-14T05:39:21Z | - |
dc.date.issued | 2010-06-01 | - |
dc.identifier.uri | http://hdl.handle.net/123456789/1586 | - |
dc.description.abstract | Performance of multi-level inverters is highly superior to conventional two-level in-verter, so they have been widely used for high-power high-voltage applications. Due to higher number of sources, lower EMI, lower %THD in output voltage and less stress on insulation, multi-level inverters are widely used. However, multi-level in- verter technology has some disadvantages as complicated PWM controlling method, increased number of components and voltage balancing problem at neutral point. In this thesis a new topology called Reversing Voltage is implemented to improve multi-level performance by compensating the disadvantages just mentioned. This topology requires fewer components compared to available multi-level inverters (es- pecially at higher number of voltage levels) and requires less carrier signals and does not need separate mechanism for balancing of the capacitor voltages. This multi-level inverter structure offers reduced device count and simple power bus structure when compared to a conventional five-level NPC and flying capacitor inverter. The topology and the control method based on sine-triangle pulse width modu- lation (SPWM) are shown and the required components are also compared to other topologies to show the superiority of the topology. In the first phase, prototype model of 1-five-level inverter using Reversing Voltage topology is prepared and tested on R-L load and 1-_ induction motor load. Finally prototype of 3-five-level inverter using same topology is prepared and tested on R-L load and 3-_ induction motor load. Detailed simulation studies were initially carried out and experimental results on different types of loads are presented and discussed. The scheme shows a very good potential of its application in induction motor drives, FACTS, HVDC transmission etc. Experimental implementation was done using AT89S52 micro-controller. The good steady state and transient performance of the inverter implemented here is ev- ident from the simulated and experimental waveforms shown in this thesis. | en |
dc.language.iso | en_US | en |
dc.publisher | Institute of Technology | en |
dc.relation.ispartofseries | 08MEE005 | en |
dc.subject | Electrical 2008 | en |
dc.subject | Project Report 2008 | en |
dc.subject | Electrical Project Report | en |
dc.subject | Project Report | en |
dc.subject | EC (PEMD) | en |
dc.subject | Power Electronics, Machines & Drives | en |
dc.subject | 08MEE | en |
dc.subject | 08MEE005 | en |
dc.subject | PEMD | - |
dc.subject | PEMD 2008 | - |
dc.title | Design and Development of Multi-level Inverter using Reversing Voltage Topology | en |
dc.type | Dissertation | en |
Appears in Collections: | Dissertation, EE (PEMD) |
Files in This Item:
File | Description | Size | Format | |
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08MEE005.pdf | 08MEE005 | 24.82 MB | Adobe PDF | ![]() View/Open |
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