Design, Implementation and Performance Analysis of Image Processing Algorithms for Cell Multi-core Processor

Abstract

Since the inception of the desktop computer, performance of software has improved at an exponential rate, primarily driven by the steady technological improvements of microprocessors. Due to fundamental physical limitations, power constraints and over heating, we are now witnessing a radical change in commodity microprocessor architecture, to multi-core designs. Multi-core architecture offers higher performance at same power consumption and manufacturing cost. As the name suggests, it combines two or more independent processors onto a single integrated circuit and is focused on improving parallelism on a thread level to improve performance (Thread Level Parallelism - TLP)

The Cell Broadband Engine Architecture (CBEA) is a Heterogeneous multicore architecture, including a 64-bit PowerPC Processor Element and eight Synergistic Processor Elements which offers a raw computing power of up to 200 GFlops per 3.2 GHz chip. The Cell bears a huge potential for compute intensive applications.

Image processing applications such as filtering, edge detection, correlation etc. require large computation power. Processing large images on a system with single processor consumes a lot of time. In this thesis work some Image processing algorithms, which consumes a lot of processing power, are implemented on CELL processor so as to take full advantage of the high processing power provided by its novice architecture. However it requires addressing many challenges for implementing such applications for CBEA.