Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/2387
Title: Automated Model Integration and Release Mechanism for Multi-core Microprocessors
Authors: Rajput, Sandip U.
Keywords: EC 2009
Project Report 2009
EC Project Report
Project Report
09MEC
09MEC016
VLSI
VLSI 2009
EC (VLSI)
Issue Date: 1-Jun-2011
Publisher: Institute of Technology
Series/Report no.: 09MEC016
Abstract: The design development, processing and validation in today's Model Building (compiling, verifying) methodology is very manual, complex and time consuming. A largev number of designers work on a single multi-core microprocessor development project which contains huge number of design les. Integrating all the changes made to the design les by the designers to a single design model, manually is very hectic and error prone job. The Automated model integration and Release Mechanism system when integrated with the legacy model build methodology can solve a lot of problems and can speed up the design development and validation. Introducing new automated model integration methodology in any project is not that straight forward. This process had number of bottle-necks and di culties. The inter design les dependency, SCM le locking problem, SCM server overloading (due to large number of tags and workspaces users and automated systems create) and huge model integration, compilation and elaboration time, were a few of them which were found to be very critical and important while testing AMI in earlier projects. These problems also needed to be solved before we actually implement AMI on the new coming multi-core project designs. One of the best solutions which were found, implemented and tested were make le system for fast compilation, Dependency resolver system to solve the dependency problem, Automated Branching and Merging system for SCM which can solve SCM le locking and help prevent dependency con icts, and SCM tag/client archival system which can reduce the load on SCM server for SCM and speed enhancement.
URI: http://hdl.handle.net/123456789/2387
Appears in Collections:Dissertation, EC (VLSI)

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