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DC Field | Value | Language |
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dc.contributor.author | Mecwan, Akash I. | - |
dc.contributor.author | Savani, Vijay G. | - |
dc.contributor.author | Gajjar, Nagendra | - |
dc.date.accessioned | 2012-01-30T08:29:44Z | - |
dc.date.available | 2012-01-30T08:29:44Z | - |
dc.date.issued | 2010-12-09 | - |
dc.identifier.citation | 1st International Conference on Current Trends in Technology (NUiCONE 2010) Institute of Technology, Nirma University, December 9-11, 2010 | en_US |
dc.identifier.uri | http://10.1.7.181:1900/jspui/123456789/2800 | - |
dc.description.abstract | In the modern era the software is taking charge of the hardware wherever possible. The traditional hardware radio is also replaced by the modern software defined radio. SDR makes the foundation of the cognitive radio domain. The direct digital synthesizer can be considered as the heart of any software radio system. This is also called Numerically Controlled Oscillator (NCO). The paper discusses the way to implement the Direct Digital Frequency Synthesizer (DDS). It has been implemented in VHDL for the Sparten 3E, xcv400 pq208 with speed grade of -4. The results for all designs are compared with respect to the area utilization. | en_US |
dc.publisher | Institute of Technology, Nirma University, Ahmedabad | en_US |
dc.relation.ispartofseries | ITFEC025-8 | en_US |
dc.subject | Direct Digital Synthesizer (DDS) | en_US |
dc.subject | LUT (Look Up Table) | en_US |
dc.subject | Quantizer | en_US |
dc.subject | EC Faculty Paper | en_US |
dc.subject | Faculty Paper | en_US |
dc.subject | ITFEC025 | en_US |
dc.subject | ITFEC024 | en_US |
dc.subject | ITFEC004 | en_US |
dc.subject | NUiCONE | - |
dc.subject | NUiCONE-2010 | - |
dc.title | Implementation of High Frequency Direct Digital Frequency Synthesizer on FPGA | en_US |
dc.type | Faculty Papers | en_US |
Appears in Collections: | Faculty Papers, EC |
Files in This Item:
File | Description | Size | Format | |
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ITFEC025-8.pdf | ITFEC025-8 | 78.21 kB | Adobe PDF | ![]() View/Open |
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