Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/3309
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dc.contributor.authorKhan, Umar Faruque-
dc.contributor.authorNaik, Amisha-
dc.contributor.authorBose, S. C.-
dc.date.accessioned2012-05-25T07:41:08Z-
dc.date.available2012-05-25T07:41:08Z-
dc.date.issued2009-11-25-
dc.identifier.citationNational Conference on Current Trends in Technology, NUCONE-2009, Institute of Technology, Nirma University, Ahmedabad, November 25-27, 2009, Page No. 39-46en_US
dc.identifier.urihttp://10.1.7.181:1900/jspui/123456789/3309-
dc.description.abstractTo describe paper, we have coined one terminology called Scaling Factor (S). Scaling Factor means varying both channel length (L) and channel width (W) such that its aspect ratio (W/L) remains same. Here we are varying scaling factor from 1 to 10 and analyzing its effect on all parameters of a two stage CMOS op-amp through graphs and then combining all graphs in a single graph. And then generating the equation for all graphs using curve fitting equations and summarizing it into one general formula that is applicable to all parameters of a two stage CMOS op-amp and also plotting all graphs again which is doing comparison between simulated graph and graph through curve fitting equation. Finally, three layouts of a two stage CMOS op-amp at scaling factor S =1, 5 and 10. And then plot one more graph between layout area and scaling factor and then add this graph to a combined graph is plotted. The comparison between pre-layout and post-layout simulation curve of all parameters of two stage CMOS op-amp with respect to scaling factor (S) is done. The design is implemented in the range of 0.35μm to 3.5 μm with a 3.3V as power supply.en_US
dc.publisherInstitute of Technology, Nirma University, Ahmedabaden_US
dc.relation.ispartofseriesITFEC007-5en_US
dc.subjectScaling Factoren_US
dc.subjectEC Faculty Paperen_US
dc.subjectFaculty Paperen_US
dc.subjectITFEC007en_US
dc.subjectNUCONEen_US
dc.subjectNUCONE-2009en_US
dc.titleEffect of Channel Length (L) Reduction on the Parameters of Two Stage CMOS Op-Amp while Keeping the Same Aspect Ratioen_US
dc.typeFaculty Papersen_US
Appears in Collections:Faculty Papers, EC

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