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DC Field | Value | Language |
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dc.contributor.author | Oza, Shruti | - |
dc.contributor.author | Devashrayee, N. M. | - |
dc.date.accessioned | 2012-05-25T09:33:29Z | - |
dc.date.available | 2012-05-25T09:33:29Z | - |
dc.date.issued | 2009-11-25 | - |
dc.identifier.citation | National Conference on Current Trends in Technology, NUCONE-2009, Institute of Technology, Nirma University, Ahmedabad, November 25-27, 2009, Page No. 70-73 | en_US |
dc.identifier.uri | http://10.1.7.181:1900/jspui/123456789/3314 | - |
dc.description.abstract | The increasing demand for high-speed communication and fast data transmission requires attention to the design of high speed circuit. MOS current mode logic (MCML) is one of the most widely used logic styles for highspeed digital circuits with higher immunity to noise. The paper compares conventional CMOS logic with MOS current mode logic and distributed MCML through inverter design using 130nm technology. | en_US |
dc.publisher | Institute of Technology, Nirma University, Ahmedabad | en_US |
dc.relation.ispartofseries | ITFEC006-6 | en_US |
dc.subject | Distributed MCML | en_US |
dc.subject | High Speed | en_US |
dc.subject | Inverter | en_US |
dc.subject | MOS Current Mode Logic | en_US |
dc.subject | EC Faculty Paper | en_US |
dc.subject | Faculty Paper | en_US |
dc.subject | ITFEC006 | en_US |
dc.subject | NUCONE | en_US |
dc.subject | NUCONE-2009 | en_US |
dc.title | MOS Current Mode Logic for High Speed Communication Using 130nm Technology | en_US |
dc.type | Faculty Papers | en_US |
Appears in Collections: | Faculty Papers, EC |
Files in This Item:
File | Description | Size | Format | |
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ITFEC006-6.pdf | ITFEC006-6 | 143.94 kB | Adobe PDF | ![]() View/Open |
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