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Title: | Design And Development Of Flexible Ac Transmission System With Numerical Protection |
Authors: | Kadia, Jignesh V. |
Keywords: | Electrical 2010 Project Report 2010 Electrical Project Report Project Report 10MEE 10MEEE 10MEEE19 EPS EPS 2010 EE (EPS) Electrical Power Systems |
Issue Date: | 1-Jun-2012 |
Publisher: | Institute of Technology |
Series/Report no.: | 10MEEE19 |
Abstract: | There is a widespread use of microelectronics, computers and high speed communica- tions for control and protection of present transmission systems. The main problem with mechanical devices is that control cannot be initiated frequently, at that time the FACTS technology gives new opportunities for controlling power. FACTS controllers are used to control the interrelated parameters that govern the operation of trans- mission system such as series impedance, shunt impedance, current, voltage, phase angle. further the damping of small signal oscillations can also be achieved. In this project, shunt and series compensated EHV transmission lines have been studies. The compensation is done using FACTS technology, viz. Thyristor Con- trolled Series Capacitor (TCSC) and Thyristor Switched Capacitor (TSC) for series and shunt compensation respectively. Both the FACTS controllers provide dynamic control over the compensation. TCSC provides a wide range of compensation by changing the ring angle and also limits the fault current in case of faults. In induc- tive mode TCSC provide protection against various kind of faults. Also TCSC helps increasing the power transfer and maintain the power system stability by improving the load angle. TSC provides control against dynamic heavy load changes to main- tain voltage drop minimum and retain the power quality and the distance protection of the EHV transmission lines are provided by using microprocessor relay (MiCOM P430C). In this project, initially EHV transmission line with TCSC has been modeled in the software package PSCAD v4.2. Various parameters of transmission lines like power transfer, sending end voltage, receiving end voltage have been analyzed for di erent fault events and after getting the required performance hardware implementation is also to be carried out. |
URI: | http://10.1.7.181:1900/jspui/123456789/3374 |
Appears in Collections: | Dissertation, EE (EPS) |
Files in This Item:
File | Description | Size | Format | |
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10MEEE19.pdf | 10MEEE19 | 45.17 MB | Adobe PDF | ![]() View/Open |
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