Design, Development and FPGA Implementation of PSK Demodulator

Abstract

The main objective of this project is to develop a demodulator for modem of the IDU of a programmable SATCOM terminal. The general requirement of IDU is to function at di erent data rates and for di erent types of encoding and modulation. Any transmission channel in space application has two fundamental limitations, power and bandwidth, risen from both regulatory as well as technological consid- erations. Thus, it is required to have a digital modulation technique providing the advantages of being power and bandwidth e cient simultaneously. Viewing this re- quirements, BPSK and QPSK modulation scheme is best suited for the application. This report explores demodulator implementation methods. The theories of oper- ation of individual modules of demodulator are described in detail in this report. Functional simulation of demodulator design is carried out in MATLAB Simulink. IP of demodulator developed in this project is to be used for any custom design. VHDL is used for the coding of the design. The developed VHDL code is technology independent, so it can be used to target any FPGA. The code is synthesized using Xilinx ISE Design Suite 13.1 software. The VHDL code is simulated using Xilinx ISE Simulator and MATLAB. FPGA's reprogrammability and high degree of parallelism attracts them for DSP applications. In this project, Xilinx FPGAs are used. The developed IP Core is implemented on Xilinx xc3s1500-4fg676 FPGA device. Overall demodulator design is tested using standard test methodologies. Testing is done in digital domain, as well as in analog domain (using ADC). Testing is done for various data rates and NCO center frequencies upto 5 MHz. Communication link is set at 67 MHz IF. Combination of synthesizer, mixer, lter and ampli er is used for down conversion from IF to NCO center frequency. The testing is done in conjunction with both, commercially available modulator device and indigenous modulator IP. The performance is observed without noise and within noisy environ- ment. The design is found to work as per requirement. Detailed description of each of the test setups and test results is provided in the report.