Analog Validation Of IP Embedded in SOC

Abstract

In a chip manufacturing industry, the design and manufacturing of all the prod- ucts like (SOC) usually involves a rigorous design activity followed by detailed and important testing and evaluation of prototypes before mass production is begun. In manufacturing continuous quality control of components and assembly is desir- able, but comprehensive testing of each completed item is not generally a ordable. However, the more sophisticated the product, or the components used within the product, then there will be more need to ensure that the nal product is fully func- tional. The ability to test nal product within given time and given budget is there for a universal problem. Post silicon validation proving the system on chip works correctly at speed and in system under di erent operating conditions like extreme temperature and voltage is always necessary, even for a perfect chip design. Gener- ally the analog silicon validation is refers to the electrical parameters measurement of analog IPs and to nding and x the bugs in integrated circuits after produc- tion. Due to extreme design complexity, it is nearly impossible to nding and x all bugs before production. This report presents an idea on how electrical validation of analog IP's(here RC oscillator and SAR ADC) is performed. The main target of the analog validation activity is to verify the correct functionality of the analog IP's which are embedded in SOC, within speci c range as per given in data sheet.