Three Phase Active Front-End Rectifier Using DSP TMS320F2812

Abstract

Current harmonics, which are injected in the utility by nonlinear loads, cause major problems that tend to deteriorate the power quality at the mains. An increasing portion of generated electric energies converted through recti ers, before it is used at the nal load. In power electronic systems, especially diode and thyristor recti ers are commonly applied in the front-end of dc-link power converters as an interface with the ac line power(grid). The recti ers are nonlinear in nature and consequently, generate harmonic currents in the ac line power. The high harmonic content of the line current and the resulting low power factor of the load cause a number of problems such as voltage distortion and electromagnetic interface (EMI) a ecting other users of the power system and increasing volt-ampere ratings of the power system equipment (generators, transformers, transmission lines, etc). This problem is mitigated by employing a Pulse width modulation recti er. The AC side voltage of the PWM recti er can be controlled in magnitude and phase, to obtain sinusoidal line current at unity power factor(UPF). Using the instantaneous reactive power theory or the p-q theory, the three phase voltages and currents are transformed into the a- reference frame. From this theory, with appropriate mathematical derivations and calculations, the actual signals are compared with the reference signals and based on the error signal the PWM switching for the recti er is generated. Using DSP TMS320F2812 the proposed algorithm is implemented. This DSP is a 32-bit xed point processor which o ers 150 million instructions per second which is well suited for performing complex calculations very quickly. Simulation based on the Instantaneous Reactive Power Theory is being carried out using PSIM Simulator. Simulation of three phase active front-end converter are veri ed under di erent load conditions and simulation results presented. Hardware implementation of Three Phase Active Front-End Converter is done and experimentally veri ed. Open Loop results are presented here in this thesis.