Evaluation of High Level Synthesis

Abstract

The objective of this project is to check the level of abstraction the HLS tool provide. This is done by the implementation of a complex algorithms like Edge detection and Motion Algorithm in Altium as High Level Synthesis Tool. This project explains the implementation of edge detection algorithms like sobel, laplacian and prewitt in real time on FPGA and makes a comparative study of speedup provided by implementing them on FPGA. Motion Estimation using Exhaustive Search is implemented on FPGA using HLS and verilog Hardware Description Language.The results show that software is ine_cient in handling image processing in real time and implementing the same design in Hardware yields a speedup in the range of 26-50 times.