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dc.contributor.authorKansagra, Keyurkumar K.-
dc.date.accessioned2013-11-23T08:35:04Z-
dc.date.available2013-11-23T08:35:04Z-
dc.date.issued2013-06-01-
dc.identifier.urihttp://10.1.7.181:1900/jspui/123456789/4015-
dc.description.abstractPM CONTROL is a cell to be used for process monitoring, on chip compensation to save power. It measures the performance of the chip for the main features. The process monitoring can be used at EWS (wafer level test) to check that the chip remains within predefined process limits or at application level during product lifetime for temperature monitoring, compensation, debug and failure analysis. Each process option is measured with a dedicated sensor including two oscillators. One oscillator measures the speed of NMOS and PMOS separately and other measures the leakage.PM CONTROL supports two types of sensors, NON-CPR and CPR sensors. CPR sensor which is used for critical path's transistors performance measurement and RC interconnect effect measurement. Work embodied in this thesis presents verification of PROMIP by running the developed testcases and making layouts of standard cell libraries which are used for the development of the PMB sensors. Layouts were prepared from the given schematics of the sensors. DRC and LVS were run on these developed layouts. CDL and GDS les were extracted from the layouts and schematics. Netlist will be generated from these les. Netlist le will be simulated. Packaging were done for sensor libraries by extracting all files.en_US
dc.publisherInstitute of Technologyen_US
dc.relation.ispartofseries11MECV06en_US
dc.subjectEC 2011en_US
dc.subjectProject Report 2011en_US
dc.subjectEC Project Reporten_US
dc.subjectProject Reporten_US
dc.subject11MECen_US
dc.subject11MECVen_US
dc.subject11MECV06en_US
dc.subjectVLSIen_US
dc.subjectVLSI 2011en_US
dc.subjectEC (VLSI)en_US
dc.titleDevelopment of Veri cation Environment for PMB (Process monitoring Box) in nm Technologyen_US
dc.typeDissertationen_US
Appears in Collections:Dissertation, EC (VLSI)

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