Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/427
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dc.contributor.authorHadial, Bharat-
dc.date.accessioned2009-02-02T09:14:58Z-
dc.date.available2009-02-02T09:14:58Z-
dc.date.issued2005-06-01-
dc.identifier.urihttp://hdl.handle.net/123456789/427-
dc.description.abstractThis dissertation explains about verification of PCI eVC using e Language. e Language is a language specially design for verification. Specman Elite tool has been used for complete verification of PCI eVC, this tool supports e Language and it is develop by Verisity. PCI eVC is verification component develop to verify PCI compliant device, however in this dissertation aim is to develop complete verification environment (PCI eVC VE) to verify PCI eVC by developing test suites, running simulation for all test suite to achieve good coverage and finding bugs. First chapter is introduction, which define topic covered in report and scope of work, it also highlight important of verification, need of e language as verification language, Specman Elite tool for verification, benefit of Specman Elite and various simulator supported by it and challenges in verification in toady’s world of VLSI. Second chapter highlights PCI protocols and role of eVC in verification field, it also describe application of PCI protocol. Third chapter gives brief idea of PCI protocol that used for transferring of data between computer and peripheral devices. eVC architecture and functioning of eVC is carried out in chapter fourth. Chapter five highlights the concept of verification methodology, it covers complete flows of verification from reading specification and achieving hundred percent verification, also it explains hoe to verify eVC with DUT. How to start verification and what are the steps need to be followed and what are the necessary things need to be covered in verification plan, is explain as well in chapter five. Chapter six provides idea of designing interrupt feature in PCI eVC, PCI hierarchy of unit and struct is also mentioning in this chapter. Simulation results of functional coverage achieved, bug found, firing checks coverage are show chapter seven, limitation in PCI eVC and challenges face in project are also mention in this chapter. Chapter eight shows summary and conclusion part of dissertation. Complete data flow of PCI protocol with appropriate time and test case written is show in Chapter nine. And finally last chapter indicates the number of literature cited, manual referred during project.en
dc.language.isoen_USen
dc.publisherInstitute of Technologyen
dc.relation.ispartofseries03MEC019en
dc.subjectEC 2003en
dc.subjectProject Report 2003en
dc.subjectEC Project Reporten
dc.subjectProject Reporten
dc.subject03MECen
dc.subject03MEC019en
dc.subjectVLSI-
dc.subjectVLSI 2003-
dc.titleVerification of PCI eVCen
dc.typeDissertationen
Appears in Collections:Dissertation, EC (VLSI)

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