Design and Simulation of Programmable Switched-capacitor Filter using 0.35μm CMOS Technology

Abstract

The objective of this work is to design a switched-capacitor filter system which is programmable with respect to the filter type (i.e. lowpass, highpass or bandpass) as well as cut-off frequency (of). The filter can be programmed to be a lowpass filter, a highpass filter or a bandpass filter also the selected filter can further be programmed to have a cut-off frequency of 10 kHz, 20 kHz, 30 kHz, 40 kHz or 50 kHz. The Quality factor (Q) of the selected filter remains unity. The system comprises of second order biquad filters, capacitor banks (for programmability) and digital logic for selecting the desired filter. The design of the filter starts from the designing of the two-stage operational amplifier for switched-capacitor circuits. The biquad active RC second-order blocks were designed for 10 kHz and Q=1 and then the resistors were replaced with equivalent switched-capacitors. The capacitor banks with NMOS switches were added in feedback to provide the programmability to each block. All the filter blocks were connected using switching logic to provide the selectivity in filter type. The design is implemented with 0.35um CMOS technology and simulated using BSIM3 modeling parameters. The pre-layout simulations are done using T-Spice (Tanner EDA) and Eldo (Mentor Graphics). Layout of the system is prepared in L-Edit (Tanner EDA) and then post-layout simulations were done in T-Spice (Tanner EDA).