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dc.contributor.authorSoni, Rajanikant-
dc.contributor.authorAmin, Gireeja-
dc.contributor.authorDevashrayee, N. M.-
dc.contributor.authorMehta, Usha-
dc.date.accessioned2014-12-09T09:07:21Z-
dc.date.available2014-12-09T09:07:21Z-
dc.date.issued2012-04-
dc.identifier.issn0974-3596-
dc.identifier.urihttp://hdl.handle.net/123456789/5234-
dc.descriptionInternational Journal Of Computer Applications In Engineering, Technology And Sciences (IJ-CA-ETS), Vol. 4 (2), April -September, 2012, Page No. 200 - 204en_US
dc.description.abstractThis paper presents a study on a digitally calibrated DAC, based on a strictly R-2R topology with operational amplifier which is able to derive high resolution - high performance DACs, in terms of INL and DNL. It has been proven by simulations that the performance of the conventional R-2R DAC can be optimized, regardless of resistors tolerance and the DAC resolution.en_US
dc.relation.ispartofseriesITFEC006-9;-
dc.subjectDigital To Analog Conversionen_US
dc.subjectResolutionen_US
dc.subjectLinearityen_US
dc.subjectINLen_US
dc.subjectDNLen_US
dc.subjectGlitchen_US
dc.subjectEC Faculty Paperen_US
dc.subjectFaculty Paperen_US
dc.subjectITFEC006en_US
dc.subjectITFEC010en_US
dc.titleDesign Simulation And Characterisation Of Op-Amp Based 3 Bit R-2r Segmented Dacsen_US
dc.typeFaculty Papersen_US
Appears in Collections:Faculty Papers, EC

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