FPGAC: - High Level Synthesis Tool

Abstract

The rapidly increasing System-on-chip (SoC) complexity is forcing researchers to shift from RTL and raise the level of abstraction, i.e. opting for high level synthesis (HLS). Despite failures of starting generations of commercial high level synthesis tools. We strongly believe that current time is turning point for shifting to HLS methodology, especially in the field of FPGA’s designing. Current generation of high level synthesis tools (HLS) have made enormous progress in providing support for various programming language, robust compilation, Optimization, and GUI based tools.In this Paper we will be first briefly explaining various topics related to Fpga’s. Then we will be explaining steps required for installation of FpgaC and finally we will be comparing the utilized resources in case of programme implemented with FpgaC and hand written VHDL.