Fault Grading Improvement for Advanced Graphics Processor

Abstract

The VLSI industry is growing according to Moore's law. As a result, an integrated circuit designs are going towards more complexity due to which testing becomes tedious and tough. A VLSI chip may fail due to many reasons like design or fabrication defects, environmental factors or a combination of these. The physical defects may consist of break in lines, short between lines at the interconnection level, shorts to substrate, point defects and imperfections such as scratches across the chip. In order to detect the faults that are induced during manufacturing, good quality tests are required. So devising good tests is one of the most important steps in manufacturing quality micro-circuits. The quality of the test is represented by its fault coverage through the fault simulation process. The effective way to test a circuit is to observe its behavior by building a logical model and then using these logical models to check the physical characteristics of the circuit. These logical models are called as the fault models. Fault Coverage is a quantitative measure of test grading. Fault Grading is the entire process of deriving a series of tests, and evaluating/grading their effectiveness in detecting possible manufacturing defects. This project work aims to come up with a methodology to meet the desire fault coverage target of 81% for the sampler and execution unit of Intel’s Graphics Processor Unit (GPU) by using various fault analysis techniques.