Design and Simulation of Carrier and Symbol Timing Synchronization for BPSK Burst Demodulator

Abstract

This work presents the design of a carrier and a symbol timing synchronization algorithms for BPSK burst mode demodulator. The system which requires this demodulator receives messages or a location data of terminals in burst mode in a random manner. At the input of a burst demodulator the data may contain a phase, a frequency, a doppler or a clock timing offset. These offsets may arise due to the reasons such as a transmitter and a receiver clock not being synchronized properly, a local oscillator carrier drift and a rotation of the satellite in its orbit. To remove the offsets introduced due to these reasons, a demodulator consists of a carrier and a symbol timing synchronization subsystems. The discrete time phase lock loop is used as a basic structure for implementing the carrier and symbol synchronization algorithms. The carrier synchronization algorithms are classified based on the type of phase error detector used namely a heuristic and a maximum likelihood approach. Among these algorithms, the performance of a maximum likelihood decision directed carrier synchronization is found better compared to the heuristic phase detector approach. Based on the timing error detector used, the symbol timing synchronization algorithms are classified into a gardner, a zero crossing, a maximum likelihood, an oerder and meyr, and a sample correlate choose smallest. The simulation result shows that the zero crossing timing error detector performs better compared to the other timing error detectors used.