6T-SRAM Cell Leakage Current Analysis & Self-Timing Circuit in the Memory

Abstract

In this report I have shown my work on the memory compilers. Memory compiler provide very flexible memory generation, is basically use for System on Chips (SoC). Here I have shown the Bitcell operation and its leakage current analysis, because in the memory array we have lots(millions) of Bitcells and hence its leakage analysis is very important. Now a days we are concern with the low power devices and circuit design, so we can apply many techniques for the SRAM also, here I have mentioned the primary work on the memory self-timing circuitry and its importance in this report, it shows that how we can efficiently track the memory instances. Here we are also providing the self -timing circuitry. This will lead us to the faster read operation and low power SRAM operations. It is going to be very useful for the Memory design, as here we increasee the speed and decrease the power for the same technology and try to track the Bitcell speed.