Semi-Custom Design Of Functional Blocks For Microprocessor Core With Timing, Power And Area Optimization

Abstract

This project discusses the design of a structured data path functional unit block of a microprocessor. It explains the total flow of the back end design starting from implementing The schematic circuit from given RTL code using standard library cells to final layout which will be fulfilled all the given constraints like operating frequency, timing violations, Area, Power, Noise, Reliability, Circuit Quality, and Layout Quality rules and scan chain insertion for Design for testability. In current trend of technology device sizes are shrinking and die area also decreases. We design the data path functional block with current technology is very challenging task. These functional blocks are working on low power. Small area is allocate for each functional block. To converge timing for each functional block with given area and power expectation is onerous. We developed various optimization technique to meet our requirement. We implemented the power and timing optimization technique for both data clock paths of a complex design. This technique mainly focuses on the gate sizing and device technology selection problem for designs with high performance requirements. This algorithm is developed based on the Lagrangian Relaxation based formulation which decouples the timing analysis from optimization without resulting in loss of accuracy. This algorithm is an iterative. It runs up to 35 iterations; we can choose the best iteration based on the power and timing improvements and apply to our design. This technique runs in three different modes, named as data only mode, clock only mode and data + clock mode. In data only mode it touches only data path cells for optimization. In clock only mode it tunes only clock cells, in data + clock mode it tunes both data and clock cells for optimization. We ran this tool on different designs having different sizes and back annotated the changes from output report. There is a good improvement in power as well as setup and hold slacks.