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DC Field | Value | Language |
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dc.contributor.author | Joshi, Mrunmayee | - |
dc.date.accessioned | 2015-08-11T08:00:22Z | - |
dc.date.available | 2015-08-11T08:00:22Z | - |
dc.date.issued | 2015-06-01 | - |
dc.identifier.uri | http://hdl.handle.net/123456789/5964 | - |
dc.description.abstract | In today`s speedily growing world of VLSI circuits, test quality has significant effect on the quality of the product. The increase in complexity of VLSI circuit has made testing more tedious and tough. So devising good tests is one of the most important steps in manufacturing quality microcircuit. Higher quality tests enable screening of chips and also discover defective chips before they leave the manufacturing plant .The quality of the test is represented by its fault coverage through the fault simulation process. The most effective way to test a circuit is to observe its behavior by building a logic model and then using these logic models to check the physical character of the circuit. These logic models are called as the fault models. High testing quality minimizes DPM (Defective parts per million) and thus can significantly reduce manufacturing costs and the probability of defective chips shipping out. The graphics processing unit (GPU) has become an integral part of today's mainstream computing systems. In multimedia technology, Graphics is the key element. So it should be made sure that it is fault free. There are many different ways to make it fault free mentioned in this report. This project work aims to come up with different methodology to develop test content for Intel's Graphics Processor Unit (GPU) that will meet the fault coverage target. | en_US |
dc.publisher | Institute of Technology | en_US |
dc.relation.ispartofseries | 13MECV08; | - |
dc.subject | EC 2013 | en_US |
dc.subject | Project Report | en_US |
dc.subject | Project Report 2013 | en_US |
dc.subject | EC Project Report | en_US |
dc.subject | EC (VLSI) | en_US |
dc.subject | VLSI | en_US |
dc.subject | VLSI 2013 | en_US |
dc.subject | 13MEC | en_US |
dc.subject | 13MECV | en_US |
dc.subject | 13MECV08 | en_US |
dc.title | Test Content Development For Next Generation Graphics | en_US |
dc.type | Dissertation | en_US |
Appears in Collections: | Dissertation, EC (VLSI) |
Files in This Item:
File | Description | Size | Format | |
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13MECV08.pdf | 13MECV08 | 2.66 MB | Adobe PDF | View/Open |
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