Design and Characterization of High Speed 10T SRAM and Analysis of Memory Compiler

Abstract

With the development of CMOS technology, memory occupies a large part on the entire chip area and hence becomes the main source of power dissipation in the SOC. SRAM is widely used in on-chip memory and as the channel length of MOSFET is scaling down, SRAM stability, density and speed becomes the major concern for future technology. In this project, a novel highly stable dual port 10T SRAM cell is proposed which is much faster and stable as compared to 6T bitcell. All the simulations are performed for 28nm technology. As we add four additional transistors, the read speed increases by 31%. The read current to leak current ratio is also improved by 17.3%. This helps in increasing the maximum number of physical rows present in a memory array. The read and write ports are different here, so the storage nodes are not affected due to read operation. This increases the Read Static Noise Margin (SNM) and ultimately the stability of the 10T bitcell by 142%. As a result, we can operate 10T at ultralow voltages which we cannot do with 6T. Due to the addition of four extra transistors, the average power dissipation is 53% more than 6T. But this power dissipation can be reduced by operating 10T at low voltages and hence average power dissipation is also optimized. The major disadvantage of 10T SRAM is area occupied and leakage current. The area occupancy is almost 2.5 times that of 6T while leakage current increases by 32%. This project also shows my work on memory compiler. In System on Chip (SoC) design, it is required to have a memory chip with different aspect ratio and different size. It is also required to have different features of memory for different requirements of the design. Memory compiler is the tool by which different instances of memory can be generated depending on the input given to the Memory compiler. A design and development flow of memory compiler is shown which depicts the step by step work on memory compiler development. The main work focuses on the various design checks, margin analysis and Quality Assurance (QA) checks.