Analysis of Don’t Care Bit Filling Techniques for Optimization of Compression and Scan Power

Abstract

Test power and test time have been the major issues for current scenario of VLSI testing. The test data compression is the well known method used to reduce the test time. The don’t care bit filling method can be used for effective test data compression as well as reduction in scan power. In this paper we describe the algorithm for don’t care assignment like MT(Minimum Transition)-fill technique and hamming distance based technique.The selective Huffman ,optimal Huffman and modified selective Huffman coding are applied on the mapping set to give the optimum Compression and weighted transition matrix is used for scan power Using these techniques find compression and scan power parameters like average power and peak power and conclude that MT- fill technique gives low peak and average powers and Hamming distance based modified selective Huffman coding technique gives higher compression ratio compare to another methods like selective and optimal Huffman coding.