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DC Field | Value | Language |
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dc.contributor.author | Mehta, Usha | - |
dc.date.accessioned | 2015-10-15T05:37:42Z | - |
dc.date.available | 2015-10-15T05:37:42Z | - |
dc.date.issued | 2010-06 | - |
dc.identifier.uri | http://hdl.handle.net/123456789/6373 | - |
dc.description | Nirma Universitty Journal Of Engineering And Technology, Vol.1 (1), Jan - Jun, 2010, Page No. 38 - 41 | en_US |
dc.description.abstract | It has been seen that the test data compression has been an emerging need of VLSI field and hence the hot topic of research for last decade. Still there is a great need and scope for further reduction in test data volume. This reduction may be lossy for output side test data but must be lossless for input side test data. This paper summarizes the different methods applied for lossless compression of the input side test data, starting with simple code based methods to combined/hybrid methods. The basic goal here is to prepare survey on current methodologies applied for test data compression and prepare a platform for further development in this avenue. | en_US |
dc.publisher | Nirma University | en_US |
dc.relation.ispartofseries | ITFEC010-28; | - |
dc.subject | VLSI | en_US |
dc.subject | Testing | en_US |
dc.subject | Data Compression | en_US |
dc.subject | EC Faculty Paper | en_US |
dc.subject | Faculty Paper | en_US |
dc.subject | ITFEC010 | en_US |
dc.title | Survey of VLSI Test Data Compression Methods | en_US |
dc.type | Faculty Papers | en_US |
Appears in Collections: | Faculty Papers, EC |
Files in This Item:
File | Description | Size | Format | |
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ITFEC010-28.pdf | ITFEC010-28 | 173.79 kB | Adobe PDF | ![]() View/Open |
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