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DC Field | Value | Language |
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dc.contributor.author | Kushwaha, Surabhi | - |
dc.date.accessioned | 2016-08-08T08:39:26Z | - |
dc.date.available | 2016-08-08T08:39:26Z | - |
dc.date.issued | 2016-06-01 | - |
dc.identifier.uri | http://hdl.handle.net/123456789/6840 | - |
dc.description.abstract | Conventional Converters have bulky inductors and high rated switches which makes system inefficient and costly. Multilevel Converters having the advantage of low voltage stress on the power switches is been used as a front end converter. For power factor improvement, Space Vector PWM (SVPWM), Hysteresis control and Sine PWM (SPWM) have been investigated. SVPWM gives fixed harmonic spectrum however it is complex to implement. Hysteresis control giving random harmonic spectrum due to random switching have been used to simulate a three phase full bridge converter as well a three phase parallel converter. SPWM which gives fixed harmonic profile, frequency modulation index and easy to imply with real time controller has been selected as a PWM technique for the control of front end converter. to have well regulated dc output voltage and unity power factor, different control techniques have been investigated. To make the control technique simple, current control with SPWM is implemented for a three level Neutral point Clamped Converter. To achieve the balancing of the dc link capacitors, offset voltage injection method has been selected out of many studied techniques from literature and applied to a two-leg NPC converter. A modified control technique is proposed and applied to a three-phase three-level NPC. It is simulated in MATLABnSimulink and results are verified. For hardware implementation, sensors were utilised and Programming on ARM Cortex have been performed by initialisation of various peripherals. | en_US |
dc.publisher | Institute of Technology | en_US |
dc.relation.ispartofseries | 14MEEP27; | - |
dc.subject | Electrical 2014 | en_US |
dc.subject | Project Report 2014 | en_US |
dc.subject | Electrical Project Report | en_US |
dc.subject | Project Report | en_US |
dc.subject | EE (PEMD) | en_US |
dc.subject | Power Electronics, Machines & Drives | en_US |
dc.subject | 14MEE | en_US |
dc.subject | 14MEEP | en_US |
dc.subject | 14MEEP27 | en_US |
dc.subject | PEMD | en_US |
dc.subject | PEMD 2014 | en_US |
dc.title | Design and Implementation of Three-Level Converter for Power Factor Correction | en_US |
dc.type | Dissertation | en_US |
Appears in Collections: | Dissertation, EE (PEMD) |
Files in This Item:
File | Description | Size | Format | |
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14MEEP27.pdf | 14MEEP27 | 27.67 MB | Adobe PDF | ![]() View/Open |
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