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DC Field | Value | Language |
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dc.contributor.author | Jain, Priyanka | - |
dc.date.accessioned | 2016-08-12T05:50:57Z | - |
dc.date.available | 2016-08-12T05:50:57Z | - |
dc.date.issued | 2016-06-01 | - |
dc.identifier.uri | http://hdl.handle.net/123456789/6859 | - |
dc.description.abstract | The development cycle of Integrated Circuit consists of number of essential sequential stages that are important for its successful completion. Post-Silicon Validation verifies the performance of the Intellectual Properties (IPs) at silicon level. Test engineers must validate these IPs, before shipping them to the customer, to meet the specifications of designing across Temperature range, Voltage and Process. Here we do Silicon Validation of Analog IPs like Voltage Regulators, Thermal Sensors, Voltage Sensors. Silicon validation of voltage regulator calls for various tests to be performed such as Die Sorting, Threshold Measurements, Regulator Modes performance with(/out) load regula- tion, Startup tests and transition timings, etc. Generally, an automated environment is used for all such measurements to minimize validation time and human error. On test completion, validation report is generated. The performance of the IP at silicon level is compared with design specifications as well as CAD results for any deviations. The validation report helps determine the maturity of Integrated Circuit (IC) device and declares the validity of functionality of the device at different operating conditions. Silicon validation is a very important step of the IC development cycle and is carried out right before the chip is introduced in the market. In order to be sure that the device is fully complaint to design specifications, electrical validation is performed for all the Analog IPs which are to be later embedded in SOC. Furthermore, the automation test run reduces considerable testing time and provides accuracy and speed and rules out human error. Several tools were used for the test environment such as test boards, testing instruments, Laboratory Virtual Instrument Engineering Work bench (LabVIEW) software and General Purpose Interface Bus (GPIB) protocol. | en_US |
dc.publisher | Institute of Technology | en_US |
dc.relation.ispartofseries | 14MECC05; | - |
dc.subject | EC 2014 | en_US |
dc.subject | Project Report | en_US |
dc.subject | Project Report 2014 | en_US |
dc.subject | EC Project Report | en_US |
dc.subject | EC (Communication) | en_US |
dc.subject | Communication | en_US |
dc.subject | Communication 2014 | en_US |
dc.subject | 14MECC | en_US |
dc.subject | 14MECC05 | en_US |
dc.title | Validation of Analog Intellectual Properties (IPs) and Implementing the Test Methodology in Python | en_US |
dc.type | Dissertation | en_US |
Appears in Collections: | Dissertation, EC (Communication) |
Files in This Item:
File | Description | Size | Format | |
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14MECC05.pdf | 14MECC05 | 3.6 MB | Adobe PDF | ![]() View/Open |
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