Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/6939
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dc.contributor.authorPatel, Maitri-
dc.date.accessioned2016-08-30T08:44:48Z-
dc.date.available2016-08-30T08:44:48Z-
dc.date.issued2016-06-01-
dc.identifier.urihttp://hdl.handle.net/123456789/6939-
dc.description.abstractMemory has become an essential part on any chip.The number of memories required on chip depends on its application,but the amount of transistors used for information storage is larger than number of transistors used in logic operations. So to increase the yield of chip it has become necessity to increase the reliability of memory. This report represents two solutions named Memory Repair IP and and Synopsys BIST. “The basic idea of BIST, in its most simple form, is to design a circuit so that the circuit can test itself and determine whether it is ‘good’ or ‘bad’…” Apart from this purpose Synopsys BIST is having so many advantages which has been explained in this report. To store and transfer the repaired information of BIST is performed by Memory Repair IP.en_US
dc.publisherInstitute of Technologyen_US
dc.relation.ispartofseries14MECV18;-
dc.subjectEC 2014en_US
dc.subjectProject Reporten_US
dc.subjectProject Report 2014en_US
dc.subjectEC Project Reporten_US
dc.subjectEC (VLSI)en_US
dc.subjectVLSIen_US
dc.subjectVLSI 2014en_US
dc.subject14MECen_US
dc.subject14MECVen_US
dc.subject14MECV18en_US
dc.titleDesign And Validation Of Mrepair Ip In 45nm Technologyen_US
dc.typeDissertationen_US
Appears in Collections:Dissertation, EC (VLSI)

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