Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/727
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dc.contributor.authorSaxena, Sudhanshu-
dc.date.accessioned2009-05-18T09:16:15Z-
dc.date.available2009-05-18T09:16:15Z-
dc.date.issued2005-06-01-
dc.identifier.urihttp://hdl.handle.net/123456789/727-
dc.description.abstractKindly look into the attachmenten
dc.language.isoen_USen
dc.publisherInstitute of Technologyen
dc.relation.ispartofseries03MEC015en
dc.subjectEC 2003en
dc.subjectProject Report 2003en
dc.subjectEC Project Reporten
dc.subjectProject Reporten
dc.subject03MECen
dc.subject03MEC015en
dc.subjectVLSI-
dc.subjectVLSI 2003-
dc.titleDesign and Development of Test on Target for Node-B sub-module using VHDLen
dc.typeDissertationen
Appears in Collections:Dissertation, EC (VLSI)

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