Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/7325
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dc.contributor.authorShukla, Ami-
dc.contributor.authorPatel, Vibha-
dc.contributor.authorGajjar, Nagendra-
dc.date.accessioned2017-01-21T06:02:29Z-
dc.date.available2017-01-21T06:02:29Z-
dc.date.issued2015-11-26-
dc.identifier.citation5th International Conference on Current Trends in Technology, NUiCONE - 2015, Institute of Technology, Nirma University, November 26 – 28, 2015en_US
dc.identifier.issn978-1-4799-9991-0/15/$31.00 ©2015 IEEE-
dc.identifier.urihttp://hdl.handle.net/123456789/7325-
dc.description.abstractEdge detection servers as a footstone step in image and video processing. These detected edges can further be given as input to other higher level applications like image enhancement, object recognition, object tracking etc. Literature provides various algorithms for edge detection in various domains. At the same time the process is extremely computational exhaustive. For carrying out this task in real time a system which is really fast is required. Software does not seem to be a suitable candidate for implementing it in real time. We require some technology that has huge amount of parallelism. The high amount of computation power in limited time can be achieved by using FPGA as a platform. Field Programmable Gate Array (FPGA) structures are reconfigurable in nature. These FPGA’s can be programmed using a Hardware Description Language. But the popularity of FPGA has increased with the availability of high level tools for configuring it. These tools make the FPGA programming easier. This work proposes a real time embedded solution of various edge detection algorithms like Sobel, Laplacian and Prewitt. The performance evaluation of the proposed work is done on various platforms. The throughput is significantly high with a speedup of 26x-50x and the design time decreasing 5 to 6 times. The real time FPGA solution of edge detection algorithms is designed using a powerful design tool Altium Designer for hardware software co design. A 32-bit soft RISC TSK3000A is integrated as a peripheral to the edge detection hardware. The very same tool is also integrated to the ASP generated by CHC(C to Hardware). This CHC takes an input from DVD player and the processed output is given to VGA monitor. The results are verified in real time with an input video from DVD and an output on the VGA monitor.en_US
dc.publisherInstitute of Technology, Nirma University, Ahmedabaden_US
dc.relation.ispartofseriesITFEC028-2;-
dc.subjectFPGAen_US
dc.subjectEdge Detectionen_US
dc.subjectAltium Designer 10en_US
dc.subjectAltium Nano Board NB2DSKen_US
dc.subjectReal Timeen_US
dc.subjectEC Faculty Paperen_US
dc.subjectFaculty Paperen_US
dc.subjectITFEC028en_US
dc.subjectITFCE003en_US
dc.subjectITFEC004en_US
dc.titleImplementation of Edge Detection Algorithms in Real Time on FPGAen_US
dc.typeFaculty Papersen_US
Appears in Collections:Faculty Papers, EC

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