Error Detection and Correction Coding For Memo

Abstract

Modern integrated circuits require careful attention to the soft-error rate (SER) resulting from bit upsets, which are normally caused by alpha particle or neutron hits. These events, also referred to as single-event upsets (SEUs), will become more problematic in future technologies. As the size of the SRAM cache and DRAM memory grows in servers and workstations, cosmic-ray errors are becoming a major concern for systems designers and end users. Several techniques exist to detect and mitigate the occurrence of cosmic-ray upset, such as error detection, error correction. Highly integrated dynamic RAM’s require compact memory cell arrays to maintain compatibility with previous generations and to keep healthy production yield. That causes insufficient storage capacitance for immunity from alpha-particleinduced soft errors. To solve this problem, several built-in error checking and correcting (ECC) circuits have been proposed. A 256-kbit DRAM with a built-in Hamming code ECC circuit is commercially available. Error correcting codes have been successfully employed to correct errors associated with failures in computer memories. A typical code which has found wide application is the binary Hamming code. This code corrects single bit errors. With the advent of large-scale integration (LSI) storage array technology, the likelihood of errors which exceed the correction and detection capability of such a code is significant. The effectiveness of single error correcting, double error detecting (SECDED) memory relies on the assumption that most errors will involve only a single bit. Some studies indicate that approximately 98% of al memory errors are single bit errors. SEC-DED memory requires 7 extra bits in a 32-bit wide memory system, but only 8 extra bits in a 64-bit wide memory system. Error correcting memory is typically slower than non correcting memory due to the error correcting circuitry. Advantage to error correcting codes is that the system can monitor the rate at which correctable errors occur, and a marginal part can be replaced before uncorrectable errors occur.