High Performance QDRII SRAM Interface with Xilinx FPGA

Abstract

The explosive growth of the Internet is boosting the demand for high-speed data communication systems. This has led to the evolution of faster processors and in driving the speed of the interfacing peripheral components higher. While the processors in these systems have improved in performance, static memories have been unable to keep up the pace. Newer SRAM architectures have evolved to support the higher throughput requirements of current systems and processors. This application note introduces QDR, which is an SRAM architecture designed to improve the SRAM interface bandwidth by more than four times that of the current solutions. For most networking applications, the improvement in throughput provided by the NoBL/ZBT SRAMs is not enough. With the introduction of QDR SRAM devices, networking applications such as ATM switches and routers benefit from the simultaneous Read and Write capabilities that can be performed. With the absence of latency and the increase in data throughput provided in the QDR SRAM, simultaneous access to the same address location is guaranteed. So for high performance as well as high bandwith requirement of the networking application, QDRII SRAM has very efficient memory architecture and QDRII SRAM is used in this project for interface with the Xilinx FPGA.