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DC Field | Value | Language |
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dc.contributor.author | Wagle, Juhi | - |
dc.date.accessioned | 2019-07-20T07:55:02Z | - |
dc.date.available | 2019-07-20T07:55:02Z | - |
dc.date.issued | 2017-06-01 | - |
dc.identifier.uri | http://10.1.7.192:80/jspui/handle/123456789/8517 | - |
dc.description.abstract | This project involves software development for PCI Express communication and Aurora protocol on Xilinxs Zynq-7045 SoC based ZC 706 Evaluation board with Vivado Design Suite. Study of PCI Express serial bus and software development is targeted for PCI Express communication with a host system. ZC706 Supports PCI Express Gen 1 and Gen 2 Capability with x4, x2, or x1 Gen 1 and Gen 2 lane width. *Communication of multiple ZC706 boards using PCI Express is also envisaged to increase the channel count. For communication between multiple Zynq boards, Aurora which is a scalable, lightweight, link-layer protocol that is used to move data across point-to-point serial links are used. Aurora provides a transparent interface to the physical layer, allowing upper layers of proprietary or industry-standard protocols to easily use high-speed transceivers. Depends on availability of the additional ZC706 board. | en_US |
dc.publisher | Institute of Technology | en_US |
dc.relation.ispartofseries | 15MECE08; | - |
dc.subject | EC 2015 | en_US |
dc.subject | Project Report | en_US |
dc.subject | Project Report 2015 | en_US |
dc.subject | EC Project Report | en_US |
dc.subject | EC (ES) | en_US |
dc.subject | Embedded Systems | en_US |
dc.subject | Embedded Systems 2015 | en_US |
dc.subject | 15MEC | en_US |
dc.subject | 15MECE | en_US |
dc.subject | 15MECE08 | en_US |
dc.title | Software Development for PCI Express and Aurora Protocol | en_US |
dc.type | Dissertation | en_US |
Appears in Collections: | Dissertation, EC (ES) |
Files in This Item:
File | Description | Size | Format | |
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15MECE08.pdf | 15MECE08 | 6.32 MB | Adobe PDF | ![]() View/Open |
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