Designing Flash and PSRAM Memory Subsystems for IoT Embedded Applications

Abstract

The space, power and application for IoT devices need a contemporary approach to system style, accentuation integration for quicker boot times, and lower standby power. For IoT devices which has form factor is small and finding high performance memory is an important aspect Flash and PSRAM are two key memory technologies that are been explored. Flash memory is nowadays well-consolidated,and mature technology for nonvolatile mem- ory application. It is an erasable and programmable memory. PSRAM which is a dynamic RAM with internally generated refresh control signal and address-control circuitry to make it behave equally to static RAM (SRAM). It combines the high density of DRAM and mimic the functionality of true SRAM. It takes low time for accessing and erasing memory. This thesis work represents designing memory solution with efficient memory in- terface between memory, controller and motherboard interconnect. Here project work carried out the memory solution which involves selecting the right controller side IO buffer, optimizing motherboard / package interconnect for space and power thru pre-silicon electrical simulation. Further thesis also covres the validation of the memory design which includes details of the post silicon validation setup and testing procedure or methods.