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DC Field | Value | Language |
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dc.contributor.author | Prajapati, Ashutosh | - |
dc.date.accessioned | 2019-07-26T05:46:01Z | - |
dc.date.available | 2019-07-26T05:46:01Z | - |
dc.date.issued | 2017-06-01 | - |
dc.identifier.uri | http://10.1.7.192:80/jspui/handle/123456789/8581 | - |
dc.description.abstract | SoCs are actually System on Chip, a complete system is fabricated on a single die. In it, several Analog IPs (Intellectual Properties) or Analog Blocks are embedded for example ADCs (Analog to Digital Converters), Crystal Oscillator for frequencies (XOSC), USB, IO Pads for making SoC to communicate with outside world,. So af- ter fabrication of SoC in fab lab, their electrical characteristics need to be validated (Checked). This process is done after the fabrication of SoC, so it is called Post Silicon Validation. Application of validation is to check whether IP is performing as per their design time specifications or not. Validation is a very crucial phase of today's design and man- ufacturing process, which takes more time as the products moving towards cutting edge technologies, multiple cores and high frequencies. Validation is responsible for ensuring that products meet applicable industry specifications, end-user expectations and business. Our main motto is to validate the electrical characteristic of analog IPs embedded on SoC. Characteristics which are validated are like static and dynamic parameters, rise and fall time, SNR, SINAD, THD, current consumption and its func- tionality according to specifications. Most of the semiconductor giants is investing huge chunk of money in testing of SoCs. Since some methods are very complex, time consuming and erroneous to perform the validation, manual test bench are upgraded to AutoLAB which are centralized control environment with basic instruments embedded in it, to increase the efficiency of work with respect to accuracy automations is required. This report help in understanding the validation process and how we actually relate the theoretical knowledge with practical world applications in real time testing of SoC, this report is more concentrated towards testing of Analog Blocks or say IP`s and the steps involved in performing validation tests on them, some basics of testing & its related parameters. | en_US |
dc.publisher | Institute of Technology | en_US |
dc.relation.ispartofseries | 15MECV16; | - |
dc.subject | EC 2015 | en_US |
dc.subject | Project Report | en_US |
dc.subject | Project Report 2015 | en_US |
dc.subject | EC Project Report | en_US |
dc.subject | EC (VLSI) | en_US |
dc.subject | VLSI | en_US |
dc.subject | VLSI 2015 | en_US |
dc.subject | 15MEC | en_US |
dc.subject | 15MECV | en_US |
dc.subject | 15MECV16 | en_US |
dc.title | Analog Validation of Analog IP's Embedded in SoC | en_US |
dc.type | Dissertation | en_US |
Appears in Collections: | Dissertation, EC (VLSI) |
Files in This Item:
File | Description | Size | Format | |
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15MECV16.pdf | 15MECV16 | 3.4 MB | Adobe PDF | ![]() View/Open |
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