SOC Integration of Third Party IP’s with Automation

Abstract

As the technology is advancing, devices are becoming more complex and more feature rich. Thus the cost of development is also increasing. Also, a huge efforts required to meet the time-to-market needs of SoCs without compromising the product quality. SoCs generally, integrate a large portion of pre-designed and pre-tested IPs. Due to critical time to market and cost reasons, SoC developers are now looking for Third Party, ready to integrate IP subsystems for new IP's. Also a new product evolves from its predecessors with enhanced performances and added features.To reduce re- development time and effort, IP-based reuse methodology is used for old IP's. In this thesis, we focus on the reuse and integration issues encountered in this paradigm shift. The concept of reuse can be carried out at the block, platform, or chip levels, and involves making the IP sufficiently general, configurable, or programmable, for use in a wide range of applications. To facilitate the connection between the IPs or integration and provide quality product with minimum cost and within lesser time, SoC developers now are seeking for different integration and validation methods. This thesis outlines the configurable IP approach that minimizes or eliminates the need to perform RTL modifications to meet specific system-on-chip (SoC) require- ments for third party IP's and reuse methodology for internal IP's . In this project, SoCs are being developed by using platform based approach and then divide and conquer approach is being used to develop and design SoC subsystems parallely. To define standard interface protocols for communication and to facilitate integration of IPs over multiple platforms is necessary. Also, to reduce verification time, efforts are made to reuse IP level environment and test scenarios. Also, subsystem based SoC integration approach is used along with reusable test environment to implement an SoC in an efficient way. The illustration of USB(Third party IP) and RTSS(Internal IP) subsystem is taken for implementation of approaches explained. This approach provides the platform for homogeneous & transparent integration of any mix of configurable/non-configurable IPs. It greatly reduces the turnaround time (between 40-50%) and minimizes designer efforts.