Please use this identifier to cite or link to this item: http://10.1.7.192:80/jspui/handle/123456789/9035
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dc.contributor.authorPatel, Amish Nitinkumar-
dc.date.accessioned2019-11-06T05:07:32Z-
dc.date.available2019-11-06T05:07:32Z-
dc.date.issued2019-06-01-
dc.identifier.urihttp://10.1.7.192:80/jspui/handle/123456789/9035-
dc.description.abstractMulti-level Inverter (MLI) is generally preferred for high-power medium-voltage applications. The increase in number of level, reduces the power semiconductor device's rating, harmonic content of machine current and switching frequency of inverter. In MLI, neutral point clamped (NPC) inverter is broadly utilized for significant advantages offered by it among different inverters. The principle drawback of NPC inverter is the fluctuation in the neutral point potential made by imbalance in dc-link capacitor voltages. Various modulation techniques are utilized for generating the gate pulses for switches (IGBTs) of diode clamped inverter or neutral point clamped inverter. Amongst these, carrier based pulse width modulation (CBPWM) and space vector pulse width modulation (SVPWM) are broadly used for switching of MLI. The project focuses on SVPWM technique as it provide inherent advantages like automatic injection of third order harmonics and better utilization of dc link voltage as compared to CBPWM technique. The space phasor diagram of 5-level NPC inverter has total of 125 switching states. The space phasor structure is divided into six segments and these segments are further divided into sixteen sectors. As all segments are of same shape, analysis of one segment is sufficient. Also, a segment has 30° symmetry. So analysis of first 30° vectors and their switching states is sufficient. The effects of these switching states on capacitor voltages are analysed and only redundant switching states are used for balancing in 2 & 3-level operation of inverter. In 2 & 3-level operation, open loop switching states maintaining the typical SVPWM pattern are switched. The balancing is achieved by switching closed loop states only when capacitor voltages goes out of band. For 4 & 5-level operation, switching states fail to balance the capacitor voltage due to unavailability of redundant switching states. A novel technique of providing extra capacitor is analysed and from that swapping or interchanging the dc-link capacitors is proposed for 4 & 5-level operation of inverter. The technique of providing extra capacitors leads to balanced capacitor voltages, at the cost of extra capacitors (capacitance value same as dc-link capacitors) and reverse blocking IGBTs of very high current rating. The swapping of dc-link capacitor technique doesn't require any active (like dc source) or passive (like inductor, capacitor) elements. It requires only reverse conducting IGBT switches to swap the dc-link capacitors. The simulation of proposed technique is carried out in MATLAB/Simulink environment with v/f control of 5.4 HP, 400 V, 50 Hz, 1430 RPM Induction Motor. The swapped capacitor control technique provides the balancing of capacitor voltages in entire speed range of operation (from 2-level to 5-level and overmodulation) in steady state as well as transient conditions.en_US
dc.publisherInstitute of Technologyen_US
dc.relation.ispartofseries17MEEP03;-
dc.subjectElectrical 2017en_US
dc.subjectProject Report 2017en_US
dc.subjectElectrical Project Reporten_US
dc.subjectProject Reporten_US
dc.subjectEC (PEMD)en_US
dc.subjectPower Electronics, Machines & Drivesen_US
dc.subject17MEEen_US
dc.subject17MEEPen_US
dc.subject17MEEP03en_US
dc.subjectPEMDen_US
dc.subjectPEMD 2017en_US
dc.titleSwapped Capacitor Control Technique for Five-Level Neutral Point Clamped Inverter Ensuring Capacitor Voltage Balancing in Entire Speed Rage of Operation in Induction Motor Drive Applicationsen_US
dc.typeDissertationen_US
Appears in Collections:Dissertation, EE (PEMD)

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