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Title: | Design and Implementation of Compact and High Efficiency Low-Voltage, Medium-Power DC Power Supply |
Authors: | Thakar, Harshit Prashantkumar |
Keywords: | Electrical 2017 Project Report 2017 Electrical Project Report Project Report EC (PEMD) Power Electronics, Machines & Drives 17MEE 17MEEP 17MEEP07 PEMD PEMD 2017 |
Issue Date: | 1-Jun-2019 |
Publisher: | Institute of Technology |
Series/Report no.: | 17MEEP07; |
Abstract: | Now a days low-voltage, medium-power dc power supply is utilized in modern application like arc furnace, arc welding, fusion technology, etc. The conventional technology has some disadvantages like power density, weight, size, etc. So to overcome this problem and to meet the structural requirement high frequency operation is required. The full-bridge along with the phase shifted topology is best suited over the other topologies, as soft switching can achieved using this topology. Also voltage regulation is possible using this scheme. For low-voltage, high-current application the diode rectification is not a feasible solution, because conduction losses are high which affects the efficiency. So to improve the efficiency synchronous rectification is a good option at the secondary side. Also a high frequency transformer is designed. Here ZVS(zero voltage switching) can be achieve using proper resonant circuit. PSPWM (Phase shifted pulse width modulation) technique along with soft switching technique are selected to reduce device on-off losses and to improve the efficiency of the power supply. Simulation of the project is carried out in PSIM simulation software with phase shifted topology and synchronous rectification. For varying the load voltage from minimum to rated, closed loop simulation is done with feed forward control method. In dynamic condition to control load voltage and load current, current control and voltage control techniques are used respectively. Whole scheme is implemented on hardware for a 12 kW dc output and results are taken for the CV(constant voltage) mode of operation. Also the results are found as per the requirement and with the help of closed enclosure thermal test is carried out. It is also verified that by paralleling MOSFET(metal-oxide semiconductor field effect transistor) at secondary side, conduction losses are reduced which helps to improve the efficiency. |
URI: | http://10.1.7.192:80/jspui/handle/123456789/9039 |
Appears in Collections: | Dissertation, EE (PEMD) |
Files in This Item:
File | Description | Size | Format | |
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17MEEP07.pdf | 17MEEP07 | 6.61 MB | Adobe PDF | ![]() View/Open |
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