Implementation Of Security Framework

Abstract

In todays era, data security is the most essential. A current embedded device provides software-based security. So, hardware-based security needed. The nuvoton PFM m487 has an arm cortex m4 core. In ARM cortex m4 controller supports Memory Protection Unit (MPU). MPU provides hardware-based security. MPU supports up to 8 regions and size of MPU is 4GB. MPU can be configured using MPU registers. Configuring MPU, we can set different attributes using for user and kernel access. MPU permits access rules to be discovered for privileged access and user program access. Memory Protection Unit provides security for unauthorized access. We can set critical data as no access so access from that region or that address gives memory fault. We can store critical data in flash memory. Communication between flash memory and other devices there is flash memory Controller. Flash memory controller is interfaced with flash memory. It handles all signals required by the flash memory. Flash memory always kept in read-only mode. Flash memory can be divided into several parts like boot loader, XOM, OTP. One part of flash memory is for user configured. There is one part is called OTP(One Time Program) memory. OTP can be programmed using ISP registers like a command, trigger. status, read and write. We have to programmed OTP very carefully because once we write data in OTP, it can not be changed or modified. OTP has the 2KB size and 1KB lock bit. We can read and write in OTP in 64-bit chunks. Keys can be stored in OTP. We are stored certificate into OTP which is useful for the firmware update. We can store cryptography keys, certificates and digital signature in One time Programmable memory. Now when firmware update request comes in embedded devices, it checks cryptography keys which are stored in OTP, if keys, digital signature matches, the firmware updating process further.