Validation of Power Management IC

Abstract

Power management integrated circuits or a system block are for managing power requirements of host system . It includes many power control and power conversion function and can be used to manage different power sources. They can be designed according to the devices especially for battery operated devices. Objective of this thesis is to validate the RTL design of PMIC and checking its operations for all probable cases.Tests are designed in such a way so that the check the functionality of the PMIC.There are tests for checking functionality like power sequence,registers read - write,JTAG interface tests when JTAG is used as main interface,USB tests when USB is used as primary interface. etc. Also BUCK converter,which is a component of PMIC is also validated.Buck IP verification is done using functional verification by OVM methodology and some features are covered using assertions. This thesis also develops the test environment for digital verification of BUCK IP,which is a mixed signal IP.