SoC Level Functional verification And Application Design of a Smart 3-Axis Accelerometer Chip

Abstract

An accelerometer is a device for measuring acceleration and gravity induced reaction forces. From this measurement, any device can run some smart application. Single- and multi-axis models are available to detect magnitude and direction of the acceleration. • Design ,programming and analysis of Application Accelerometer is programmed for the following detection and it’s purpose. I have generated algorithm for following application and also programmed in coldfire language. In some application I have design without coldfire processor and with coldfire processor, then compaires the memory and time requirement for running the application. 1. 0g (fall) detection for preventation of data loss. Important of fall detection:- A key benefit of laptop computers is that they are mobile, but with that mobility comes the risk of being dropped. High shock events put the hard- disk drive and the user data contained in it at risk. With more users transitioning from desktops to laptops as their primary computers, it has become increasingly important to provide a robust solution to help protect the hard-disk drive and prevent data loss. So accelerometer will detect the free fall detection and power off the hard disk so data will not be lost. 2.Tilt and 3D orientation detection for resolution improvement 3.Tap and double tap detection for run or stop any application 4.Dead reckoning 5.Shock, vibration and sudden motion detection I have done the analysis of above application related to coldfire CPU. It also shows the information regarding memory size , total number of cycle requirement and power consumption for a particular application. It also shows the memory size, total cycle, power consumption with respect to different sampling rate. • SOC level verification The accelerometer include number of blocks , such as Modulo timer, Power delay block, Port controller, clk generator ,system integration module, memory, etc. Among them some blocks are used in system level application So I have generated system level testcases for the Power delay block , port control and Modulo timer for the SOC level verification. These testcases are in c language, verilog nd system verilog . This Accelerometer is used in below areas for the smart application: • Cellophanes. • Personal Navation Devices. • Pedometry. • Gaming and Toys.