Power Optimization in SoC

Abstract

To fulfill the demand for high performance in advanced technology, a large number of components need to be fit in a System on Chip (SoC) and thus increases the power consumption of SoC. A portable device that requires more Hours of Battery Life (HoBL) should consume low power. The low power consumption requirement of SoC leads to the VLSI design to optimize `Power', `Performance', and `Area'. An SoC design involves a huge number of synchronous elements in order to create FSM, storage points, etc. These synchronous elements operate on a high frequency in order to perform computation in minimum time. Clock signals are mainly used for synchronization and they don't perform any computation. Clocks are the most active signal in SoC and burn a big part of the total power consumption of SoC. Power reduction techniques should have to address different components of clock power consumption. Clock network which has buffers/inverters \& interconnects and register internal clock circuitry is mainly the largest contributor to the total clock power consumption. Multi Bit Flip Flop (MBFF) is one of the techniques to reduce the total clock network power and register internal and switching power. An MBFF uses a single clock pulse and provide the same functionality as Single Bit Flip Flops (SBFF). By using MBFF, duplication of buffers/inverters in a clock path can be avoided and thus reduces the clock network area. As the number of inverters/buffers is reduced by using MBFFs, it also reduces the routing congestion. MBFF also helps to improve Clock Tree Synthesis (CTS) runtime, skew, and latency because of efficient clock synthesis. In this work, two design blocks are taken and in that eligible SBFF flops are converted into dual or quad bit flip flops. The percentage of SBFF to MBFF conversion achieved is ~ 62\% and 78\% respectively. This gives clock network area improvement of around ~4\% \& 10\% in block1 and block 2 respectively. Usage of MBFF gives a dynamic power reduction of 14\% and 8\% in block 1 and block 2 respectively.