Automate DRC and LVS Run

Abstract

Customers are sometime facing an issue with DRC and/or LVS with Synopsys memory compilers. Design rule check (DRC) verifies whether the designed layout can be manufactured by the fabrication lab with a good yield. Layout versus schematic (LVS) verifies whether the layout of the design is functionally equivalent to the schematic of the design. Synopsys Application Engineers (AE) replicates the customers’ testcase and run DRC and LVS on each instance manually. It is time consuming task for AEs. Instead of manually running DRC and/or LVS for each instance that customers send. There is a need to automate this process to save time and provide quicker response to customers.

User need to give the configuration as input. The Frontend and Backend views of the instance is generated using “vmc" command. The “view select” option is modified in the configuration file to make the instance generation faster. The ruledeck path is generated by providing the information such as CCS Process, CCS release and metal stack. By using the queryccs -rel command, the value for CCS process, CCS release and metal stack can be obtained. The Cir and GDS file are required for running LVS and only GDS file for DRC. By using standalone command of DRC/LVS for different tools, one can run DRC/LVS on the given configuration file.

The script has been enhanced for multiple configuration files. The script will generate the “Top level report" which contains information about ruledeck path and DRC/LVS errors. User can refer this report instead of finding DRC/LVS errors from each individual DRC/LVS report which corresponding to each configuration file.

By automate DRC and LVS run, the time needed to run DRC/LVS has been reduced. In case of CALIBRE/ICV_ DRC_LVS, there is an approximate 50% reduction in the timing if run DRC and LVS both using the script. Whereas, in case of CALIBRE/ICV_ DRC/LVS, there is an approximate 44.4% reduction in the timing if run either DRC or LVS using the script.