Please use this identifier to cite or link to this item:
http://10.1.7.192:80/jspui/handle/123456789/11256
Title: | Xilinx Platform Management using Subsystem Technical Reference Designs (TRD’s) |
Authors: | Koshti, Sanjay |
Keywords: | EC 2020 Project Report 2020 EC Project Report EC (ES) Embedded Systems Embedded Systems 2020 20MEC 20MECE 20MECE11 |
Issue Date: | 1-Jun-2022 |
Publisher: | Institute of Technology |
Series/Report no.: | 20MECE11; |
Abstract: | Modern embedded processing systems frequently have a diverse set of individually complex requirements, often including application processing, real-time processing, high data bandwidth processing, and requirements for peripherals to handle human-machine interfaces, data I/O, and system control. All of this must be managed within a power budget, and frequently, the power budget varies with the required functions to be performed. Such requirements typically cannot be met by a single type of processor. With the introduction of the Zynq UltraScale + MPSoC, Xilinx brings to market a new all-programmable device where multiple processing elements can be designed to focus independently on a subset of the required functions. When these independently operable elements are assembled together in a heterogeneous system, a highly diverse set of processing requirements can be met with a very high level of operational efficiency. In addition, power and performance can be ideally balanced against each other, thanks to the many power management features implemented in the Zynq UltraScale + MPSoC. |
URI: | http://10.1.7.192:80/jspui/handle/123456789/11256 |
Appears in Collections: | Dissertation, EC (ES) |
Files in This Item:
File | Description | Size | Format | |
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20MECE11.pdf | 20MECE11 | 2.03 MB | Adobe PDF | ![]() View/Open |
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