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DC Field | Value | Language |
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dc.contributor.author | Patel, Ayush Ashok | - |
dc.date.accessioned | 2023-08-21T07:28:20Z | - |
dc.date.available | 2023-08-21T07:28:20Z | - |
dc.date.issued | 2023-06-01 | - |
dc.identifier.uri | http://10.1.7.192:80/jspui/handle/123456789/11924 | - |
dc.description.abstract | An advanced microcontroller can have numerous configurations based on the applications and its power requirement depends on such configurations. This paper proposed a methodology to estimate the power consumption of microcontroller application using the Machine Learning models. The model is developed from device configuration and measurement data captured from the physical device. Two ways of model development approach Flat and Hierarchical, are presented in this paper. With flat model approach the error % is nearly around ±10% and with hierarchical model, the error % is around ±5%. Estimating the energy consumption of applications is a key aspect in optimizing automotive microcontroller embedded systems energy consumption. Power constraints are increasingly becoming the critical component of the design specification of these systems. A new approach for power analysis of automotive microcontroller is being proposed. The idea is to look at the power consumption in an automotive microcontroller from the point of view of the actual software or instructions executing on the processor. The basic component of this approach is a measurement based, instruction-level power analysis technique. The technique allows for the development of an instruction-level power model for the given processor, which can be used to evaluate software in terms of the power consumption, and for exploring the optimization of software for lower power. | en_US |
dc.publisher | Institute of Technology | en_US |
dc.relation.ispartofseries | 21MECV07; | - |
dc.subject | EC 2021 | en_US |
dc.subject | Project Report 2021 | en_US |
dc.subject | EC Project Report | en_US |
dc.subject | EC (VLSI) | en_US |
dc.subject | VLSI | en_US |
dc.subject | VLSI 2021 | en_US |
dc.subject | 21MEC | en_US |
dc.subject | 21MECV | en_US |
dc.subject | 21MECV07 | en_US |
dc.title | Low Power Checks and Power Estimation at RTL Level | en_US |
dc.type | Dissertation | en_US |
Appears in Collections: | Dissertation, EC (VLSI) |
Files in This Item:
File | Description | Size | Format | |
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21MECV07.pdf | 21MECV07 | 1.91 MB | Adobe PDF | ![]() View/Open |
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